1. Field of the Invention
This invention relates to using improved analog to digital and digital to analog conversion techniques for digital storage of data and more particularly to using such improved analog to digital and digital to analog conversion techniques using delta modulation.
2. Description of the Prior Art
During the last fifteen years, tremendous time, money and efforts have been devoted to translating analog signals into digital data. A wide variety of converters have been developed.
For example, analog to digital conversion can involve either a serial process or a parallel process. Serial conversion frequently allows for a simpler and a less costly implementation but tends to be slower than parallel conversion.
A further consideration is the amount of noise that is permitted. The more bits that are used for quantifying the analog signal, the less quantization noise that will result from the conversion and the greater the dynamic range of the system. For example, using simple pulse code modulation (PCM), 128 separate levels as represented by 7 bits are required for a dynamic of 42 dB while 131,072 separate levels or 17 bits is required for a dynamic range greater than 100 dB.
One digital to analog system that may have relatively high dynamic range and low quantization noise is a delta modulation system, which is a one bit output form of a PCM system. FIG. 1 represents the classic delta modulation system 10. An input analog signal e.sub.i signal is fed through a comparator 12 with the output signal .epsilon. of the comparator 12 representing which of the input signal e.sub.i and a feedback output signal e.sub.1 of an integrator 14 is greater. That output .epsilon. is modulated by a modulator 16 supplied with a periodic pulse train from a pulse generator 18. In effect, the modulator 16 samples the output .epsilon. of the comparator 12. The output of the modulator e.sub.o is fed back for integration by an integrator 14.
The result is that the output e.sub.o of the delta modulator 10 is a series of pulses. The pulses represent the rate of change of the signal amplitude from sampling instant to sampling instant.
A system 20 to reconstruct the original input signal e.sub.i is shown in FIG. 2. The output e.sub.o of the delta modulator is integrated by an integrator 22 and is then inputted to a low pass filter 24 to eliminate high frequency noise caused by the sampling or the modulation. Alternatively, a frequency limited integrator may be used.
To reduce noise in the system, a higher frequency for the pulse train can be used. Further, instead of using just one integrator in the modulator and demodulator, two integrators may be used. Details regarding different types of delta modulators may be found in a variety of textbooks, including Philip F. Panther, Modulation, Noise and Spectral Analysis (1965).
However, delta modulators have several disadvantages. They are relatively slow in responding to rapid, large changes in the amplitude of the input signal. Further, delta modulators lose all D.C. information contained in the original analog signal. In addition, delta modulators have limited resolution.
Delta modulators also cause quantization noise in the resultant analog output signal upon conversion back to an analog signal. Commonly, such quantization noise can be avoided by dithering.
Another example of a delta modulator that overcomes some of these problems is shown in U.S. Pat. Nos. 5,021,786 and 5,124,706 to Gerdes and owned by the Assignee of the instant application. This patent describes an analog circuit that presets the delta modulator to compensate for overshoot and undershoot. This patent also includes a diode current steering bridge that controls the rate of charging or discharging the signal capacitor used in the delta modulator. The rate control circuit of this prior art patent provides a maximum rate of increase in the magnitude of the integrating current instantly for large changes in magnitude through the use of presets. That instant large current change is potentially undesirable. Further, the rate control circuit is an analog circuit and lacks the ready flexibility of a digital circuit.
Another problem with typical audio transmission systems is that typically the converted signals are grouped in some type of word or packetized coding. Common word coding schema include multi-bit PCM, Huffman coding or the like where a digital word is transmitted. Depending upon the coding technique used, the loss of even one bit in the word during transmission may cause the transmitted signal to lose intelligibility. For example, if speech is encoded with eight bit PCM using two's complement notation, the loss of the most significant bit in the word normally results in the data point being a positive number instead of a negative number. This can induce large scale audible errors at the receiver rendering the digitally transmitted audio signal unintelligible. Typically, it is believed that such word or packetized digital transmission systems have unintelligible speech measured against an articulation index at bit error rates of 0.0001; i.e., 1 error in 10,000.
Therefore, it is a first object of this invention to provide a relatively simple analog to digital converter that provides high speed conversion with good resolution. It is a further object of this invention to avoid the use of dithering to remove quantization noise and to avoid the loss of DC signals. And it is a still further object of this invention to provide such a converter that is simple and that may be incorporated into one integrated circuit. It is yet an another object to provide a system that will transmit intelligible voice information in an extremely noisy environment such as one that produces a bit error rate of 0.01.